Siemens Romania R&D
Siemens Romania R&D

Siemens Romania R&D

Located in Brașov, Cluj-Napoca and București, Siemens R&D activity is represented in România by Siemens Advanta Development and Siemens Technology teams. Scientists, engineers and software developers support Siemens in fulfilling the demands of digitalization. We deliver product development services for hardware, software and engineering, in the field of energy, industry, e- mobility and smart infrastructure. Also, we are experts in IT services and solutions, where web, mobile and SAP based...

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Digital IC Verification Engineer | Siemens Romania R&D
Job
  • Work place: Hybrid

  • Collaboration: Employment contract

  • Work time: Full Time

  • Seniority: Individual Contributor

  • Experience: 4-6 years

  • Updated on: 7 days ago

  • Vacant from: 23 Sep, 21

  • Expires on: 24 Jan, 22

  • Pay: Negotiable

  • Categories: Fullstack

Company
  • Size:> 500 employees

  • Industry:Information Technology and Services

Market (net €/month)
  • Only Loginro members with a minimum completed profile that share their salary expectations for this position may access its industry median pay.
Role

The challenge

•             Actively involve in the functional verification steps:

               - analysis of HW architectures, definition of verification strategies, appropriate verification techniques and verification patterns

               - definition and implementation of Verification and Test Plans

               - implementation and reuse of complex verification components and testbenches

               - testcases implementation and plan-to-closure verification (simulation-based and/or formal, HW-assisted acceleration)

               - problems debug, analysis and documentation

               - analysis of metrics and performance, verification improvements

               - creating reports and verification documents

•             Support other members of the design and verification team

•             Identify and implement potential improvements in design and verification flow

Requirements

•             Actively involve in the functional verification steps:

               - analysis of HW architectures, definition of verification strategies, appropriate verification techniques and verification patterns

               - definition and implementation of Verification and Test Plans

               - implementation and reuse of complex verification components and testbenches

               - testcases implementation and plan-to-closure verification (simulation-based and/or formal, HW-assisted acceleration)

               - problems debug, analysis and documentation

               - analysis of metrics and performance, verification improvements

               - creating reports and verification documents

•             Support other members of the design and verification team

•             Identify and implement potential improvements in design and verification flow

The candidate

•             BSc/MSc/PhD degree in Electrical Engineering/Automation/ Computer Science

•             5+ (senior level) years of relevant experience in Digital IC Verification

•             Proven experience in functional verification of complex SoC/ASIC/FPGA designs at different levels (module, toplevel)

•             Proficiency in HVLs (SystemVerilog/e) and/or HDLs (VHDL/Verilog), strong understanding of OOP concepts

•             Proficiency in one or more simulation-based verification methodologies (UVM/eRM/VMM/OVM), implementation and reuse of verification components

•             Experience in Formal Verification, SW-driven verification, HW-assisted acceleration and/or C/C++ modeling is a big plus

•             Proficiency in simulation tools and verification flows, Linux environments and scripting languages (Perl/Python/Tcl/sh)

•             Experience in digital circuits addressing different domains (control, communication, signal processing), different architectures (single/multicore), interfaces and protocols

•             Experience in RTL design is a big plus

•             Experience with HW Security or Functional Safety is a big plus

•             Team player, aim for a high quality standard, like challenges, open to learn new things, desire for self-improvement and innovations


 

Needed Skills

FPGA

HVL

Perl

Python

Available in

Brasov

Benefits included

Meal tickets

Medical subscription

Additional vacation days

Learning budget

Remote working (offsite)

Work from home

Flex time (07:00 - 19:00)

Stocks/shares

Office perks (ping-pong, juice, gaming spaces ie)

Gym & sport subscriptions

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